Electrical Engineering Computer Vision Cybersecurity

IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems

DFTS 2026

Date 30-2 September 2026
Location Rome, Italy
Venue Rome
Format In Person

About this Conference

An annual symposium focusing on defect and fault tolerance in VLSI and nanotechnology systems. The conference provides an open forum for combining academic research with industrial insights, covering various aspects of design, manufacturing, testing, reliability, and security of technological systems.

Call for Papers

Authors are invited to submit original and unpublished contributions in areas related to defect and fault tolerance. Submissions should be no longer than 6 pages, adhering to the IEEE conference template (2-column style). Papers can be submitted as regular papers (6 pages) or short papers (4 pages). Both types will be included in IEEE proceedings. Full papers from RISC-V Summit are welcome.

Important Dates

  • Abstract Submission April 24, 2026
  • Full Paper Submission May 1, 2026
  • Notification July 10, 2026
  • Camera Ready July 24, 2026
  • Conference dates 30-2 September 2026